Yogesh Singh Chauhan is a Professor at the Indian Institute of Technology Kanpur. His research interests include the physics, characterization, and modeling of nanoscale semiconductor devices, and RF circuit design. He is the developer of several industry standard models, including the BSIM-BULK (BSIM6), BSIM-IMG, BSIM-CMG and ASM-HEMT models.
Director of RF Innovation at Globalfoundries, USAPrincipal Member of Technical Staff at Globalfoundries USAJuan Pablo Duarte Sepúlveda is currently working toward his PhD. degree at the University of California, Berkeley. He received his BS (2010) and MS (2012) degrees in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST). He held a position as a lecturer at Universidad Tecnica Federico Santa Maria, Valparaiso, Chile, in 2012. He has authored many papers in nanoscale semiconductor device modeling and characterization. He received the Best Student Paper Award at the 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) for the paper "Unified FinFET Compact Model: Modelling Trapezoidal Triple-Gate FinFETs.Pragya Kushwaha is currently a Postdoctoral Researcher with Prof. Chenming Hu in the BSIM Device Modeling Group at University of California, Berkeley. She received her PhD degree from Indian Institute of Technology Kanpur, India in 2017. She has authored several national and international research papers in the area of semiconductor device modeling and characterization. During her PhD, she has developed a complete RF compact model for FDSOI transistors under the frame work of industry standard BSIM-IMG compact model. Her current research interests include modeling, simulation, and characterization of advanced semiconductor devices such as nanowires, NCFETs, PD/FDSOIs, FinFETs, tunnel FETs, high-voltage FETs, and bulk MOSFETs.Harshit Agarwal received the PhD degree from Indian Institute of Technology Kanpur, India in 2017. He is currently working as center manager and post-doc fellow at Berkeley Device Modeling Centre, BSIM group, University of California Berkeley, Berkeley, USA. He has been involved in the development of multi-gate and bulk MOSFET models. He is also involved in the modeling and characterization of advanced steep sub-threshold slope devices like negative capacitance FETs, tunnel FET etc. He has authored several papers in the field of semiconductor device modeling, simulation and characterization.Industry Standard FDSOI Compact Model BSIM-IMG for IC Design helps readers develop an understanding of a FDSOI device and its simulation model. It covers the physics and operation of the FDSOI device, explaining not only how FDSOI enables further scaling, but also how it offers unique possibilities in circuits. Following chapters cover the industry standard compact model BSIM-IMG for FDSOI devices. The book addresses core surface-potential calculations and the plethora of real devices and potential effects. Written by the original developers of the industrial standard model, this book is an excellent reference for the new BSIM-IMG compact model for emerging FDSOI technology.
The authors include chapters on step-by-step parameters extraction procedure for BSIM-IMG model and rigorous industry grade tests that the BSIM-IMG model has undergone. There is also a chapter on analog and RF circuit design in FDSOI technology using the BSIM-IMG model.