High-Level VLSI Synthesis

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Gewicht:
610 g
Format:
235x155x22 mm
Beschreibung:

1. Essential Issues and Possible Solutions in High-Level Synthesis.- 2. Architectural Synthesis for Medium and High Throughput Signal Processing with the new CATHEDRAL environment.- 3. PYSIN - High-Level Synthesis of Application Specific Pipelined Hardware.- 4. The IBM High-Level Synthesis System.- 5. MICON: Automated Design of Computer Systems.- 6. Cyber: High Level Synthesis System from Software into ASIC.- 7. Specification and Synthesis of Interface Logic.- 8. Synthesis of ASICs with Hercules and Hebe.- 9. Synthesis from Pure Behavioral Descriptions.- 10. Architectural Optimization Methods for Control-Dominated Machines.- 11. Global Scheduling and Allocation Algorithms in the HAL System.- 12. High-Level Synthesis in the THEDA System.- 13. Industrial Uses of the System Architect's Workbench.- 14. Unified System Construction (USC).- 15. Scheduling and Assignment in High Level Synthesis.
The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de scriptions started in the early 1970' s, there was no automated path from the register transfer design produced by high-level synthesis to a complete hardware imple mentation. As a result, it was very difficult to measure the effectiveness of high level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today's more mature CAD techniques help close the gap between an automat ically synthesized design and a manufacturable design. Market pressures encour age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today's leading edge designers using logic synthesis systems are training themselves to be tomorrow's consumers of high-level synthe sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:n plexity of the systems being designed, all make higher-level design automaton inevitable.

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