This book gathers a collection of papers by international experts that were presented at the International Conference on NextGen Electronic Technologies (ICNETS2-2016). ICNETS2 encompassed six symposia covering all aspects of the electronics and communications domains, including relevant nano/micro materials and devices. Highlighting the latest research on nanoelectronic materials and devices, the book offers a valuable guide for researchers, practitioners and students working in the core areas of functional electronics nanomaterials, nanocomposites for energy application, sensing and high strength materials and simulation of novel device design structures for ultra-low power applications.

The Effect of Functionalized MWCNT on Mechanical and Electrical Properties of PMMA Nanocomposites.- Performance Analysis of Dual-Metal Double-Gate Tunnel-Fets for Ultralow Power Applications.- Films of Reduced Graphene Oxide based Metal Oxide Nanoparticles.- Size optimization of InAs/GaAs quantum dots for longer storage memory applications.- Design and Analysis of a CMOS 180 nm Fractional N Frequency Synthesizer.- Memristor based Approximate Adders for Error Resilient Applications.- Integrated Mems Capacitive Pressure Sensor with On-Chip CDC for a wide Operating Temperature Range.- A High SNDR and Wider Signal Bandwidth CT ∑∆ Modulator with a Single Loop Non-linear Feedback Compensation.- Design of Current Mode CNTFET Transceiver for Bundled Carbon Nanotube Interconnect.- Weak Cell Detection Techniques for Memristor Based Memories.- Enhancement of Transconductance using Multi-recycle Folded Cascode Amplifier.- Nondestructive Read Circuit for Memristor based Memories.- A Built in Self Repair Architecture for Random Access Memories.- A Current Mode DC-DC Boost Converter with Fast Transient and on-chip Current Sensing Technique.- A Modified GDI Based Low Power & High Read Stability 8T SRAM Memory with CNTFET Technology.- High Performance Trench Gate Power MOSFET of Indium Phosphide.- Memristor Equipped Error Detection Technique.- 28nm FD-SOI SRAM Design using Read Stable Bit Cell Architecture.- Design and Verification of Memory Controller with Host WISHBONE Interface.- 8-Bit Asynchronous Wave-Pipelined Arithmetic-Logic Unit.